17:11:41 Shelby still foaming at the mouth it seems 17:11:49 annoymint 17:34:01 is the guy still around? 17:34:44 he just commented https://github.com/tevador/RandomX/issues/11#issuecomment-841842803 17:35:31 tromp replied too. I think tromp is forgetting that e.g. we require support of IEE754 rounding modes, specifically to keep edge cases in play 17:36:05 and shelby's comment that we don't make use of branch predictors is also false 17:36:17 the CPUs have them and will always use them - can't be turned off 17:41:30 "Or may possible to more deeply pipeline for certain permutations that might occur too infrequently in typical programs" 17:42:00 I guess that's a valid point if randomx programs where clearly more randoms than all other programs ran on CPUs, combined 17:42:45 So they'd optimize CPUs for all other actually-not-so-random programs in the world, hence loosing performance on randomx ^^ 17:43:17 <\x> hyc: got me this last week https://imgur.com/a/xrNK6m2 17:43:29 <\x> intel's last 14nm+++ ULV chip 17:43:38 Anyway good hand-wavy wall of text, I missed that guy lol 17:43:40 <\x> the first and last 6c/12t ulv i think 17:49:47 lol 17:50:31 with a random distribution of instructions, that means occasionally a stream will be emitted that matches a CPU's optimization target 18:07:39 This random stream of instructions actually has frequencies of different instructions tuned to match real CPUs :D 18:07:50 also frequencies of memory reads/writes 18:13:15 :) 18:16:57 One worrying tendency is that Zen3 has lower IPC than Zen2 on RandomX due to slow L3 cache. RandomX didn't assume this (bigger, but slower cache) 18:17:36 xmrig has an optimization to prefetch L3 accesses too, but there's not much of computation to squeeze there. Maybe future RandomX tweak can address it. 18:18:52 But when I tested it on rx/arq (I think) with 256 KB scratchpad (L2 only), Zen3 had 4% better IPC. 18:19:34 So the general direction of CPU progress matches what RandomX was tuned for