19:48:20 <hyc> So, next year's Macbook will be based on Apple's own ARM chip
19:48:22 <hyc> https://arstechnica.com/gadgets/2020/04/report-apple-will-begin-selling-macs-with-its-own-processors-in-2021/?utm_brand=arstechnica&utm_source=twitter&utm_social-type=owned&utm_medium=social
19:49:13 <selsta> randomx benchmarks will be interesting
19:49:35 <sech1> hyc did you know that these days code optimizations involve _adding_ more instructions to the code?
19:49:53 <sech1> I literally added one instruction to the generated RandomX code to get 1% speedup on Ryzen
19:50:49 <moneromooo> What insn ?
19:51:35 <moneromooo> "interrupts off" :D
19:51:54 <sech1> No, "jmp $+2"
19:52:00 <sech1> which is essentially a no-op
19:52:07 <sech1> but it speeds up things mystically
19:53:47 <moneromooo> Alignment to cache ?
19:54:12 <sech1> my theory it has something to do with uOp cache
19:54:35 <sech1> but I have no clue what actually happens and what it triggers inside the CPU
19:54:52 <sech1> the trick doesn't work on Intel btw
19:55:25 <hyc> I'd be more inclined to believe cache alignment
19:55:34 <moneromooo> It's odd since if it's that easy you'd expdct the cpu to do it itself.
19:55:49 <moneromooo> (if not alignment)
19:56:08 <sech1> I theorized that ldmxcsr switched CPU from uOp cache to the regular x86 decoder
19:56:18 <sech1> and jmp instruction was supposed to force it back to uOp cache
19:56:25 <hyc> interesting
19:56:28 <sech1> but I'm not sure this is what actually happens there
19:56:42 <hyc> I guess there's no perf counters to expose uOp cache operation
19:58:35 <moneromooo> And a 2 byte nop doesn't speed up I assume ?
19:58:51 <moneromooo> (if jmp $+2 takes two bytes)
20:05:49 <sech1> No, it has something to do with what jmp does
20:06:42 <sech1> Because I found in the AMD optimization manual that switch between uOp cache and x86 decoder can only happen after a completed jump
20:08:42 <selsta> sech1: btw I tried to compile randomx for iOS, do you know why it doesn’t recognise the ARM asm syntax in jit_compiler_a64_static.S?
20:10:08 <sech1> maybe you need some special compiler options, no idea
20:13:15 <selsta> first it didn’t like the `/*` style of comments and then `.global DECL(randomx_program_aarch64)` stuff
20:13:18 <selsta> hmm ok
20:15:46 <sech1> There are no /* comments in that file
20:16:14 <asymptotically> selsta: i think the /* comments depend on if you call the assembler directly, or if you get gcc to call the assembler for you
20:16:52 <sech1> ah, you compiled RandomX repo
20:16:59 <sech1> xmrig's version should compile fine
20:20:37 <selsta> all I did was `cmake .. -GXcode -DCMAKE_SYSTEM_NAME=iOS -DARCH_ID=armv8-a` to create a Xcode project and then compile to my phone
20:20:48 <selsta> but no idea if that should work :) will try xmrig
20:48:26 <selsta> the xmrig version uses `#` for comments which Xcode also doesn’t like
20:48:33 <selsta> I give up lol
20:53:31 <hyc> should be using ; for asm comments
20:54:51 <selsta> It wouldn’t be too interesting anyway until the ARM macbooks get released
20:57:18 <tevador> that Ryzen optimization is some µarch black magic